Kaeslin, Hubert: search on Z-Library

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1

[IEEE 2012 IEEE International Symposium on Circuits and Systems - ISCAS 2012 - Seoul, Korea (South) (2012.05.20-2012.05.23)] 2012 IEEE International Symposium on Circuits and Systems - Hardware-efficient random sampling of fourier-sparse signals

Maechler, Patrick, Felber, Norbert, Kaeslin, Hubert, Burg, Andreas

Year:

2012

Language:

english

File:

PDF, 628 KB

english, 2012

2

[IEEE 2012 19th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2012) - Seville, Seville, Spain (2012.12.9-2012.12.12)] 2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012) - High-speed compressed sensing reconstruction on FPGA using OMP and AMP

Bai, Lin, Maechler, Patrick, Muehlberghuber, Michael, Kaeslin, Hubert

Year:

2012

Language:

english

File:

PDF, 382 KB

english, 2012

3

A low-power transmission-gate-based 16-bit multiplier for digital hearing aids

Flavio Carbognani, Felix Buergin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner

Journal:

Analog Integrated Circuits and Signal Processing

Year:

2008

Language:

english

File:

PDF, 478 KB

english, 2008

4

Digital Integrated Circuit Design (From VLSI Architectures to CMOS Fabrication) || Introduction to Microelectronics

Kaeslin, Hubert

Year:

2008

Language:

english

File:

PDF, 1.12 MB

english, 2008

5

Digital Integrated Circuit Design (From VLSI Architectures to CMOS Fabrication) || Acquisition of Asynchronous Data

Kaeslin, Hubert

Year:

2008

File:

PDF, 442 KB

2008

6

[IEEE 2014 IEEE 25th International Conference on Application-specific Systems, Architectures and Processors (ASAP) - Zurich, Switzerland (2014.6.18-2014.6.20)] 2014 IEEE 25th International Conference on Application-Specific Systems, Architectures and Processors - SIR10US: A tightly coupled elliptic-curve cryptography co-processor for the OpenRISC

Gautschi, Michael, Muehlberghuber, Michael, Traber, Andreas, Stucki, Sven, Baer, Matthias, Andri, Renzo, Benini, Luca, Muheim, Beat, Kaeslin, Hubert

Year:

2014

Language:

english

File:

PDF, 1.06 MB

english, 2014

7

[IEEE 2014 IEEE International Symposium on Circuits and Systems (ISCAS) - Melbourne VIC, Australia (2014.6.1-2014.6.5)] 2014 IEEE International Symposium on Circuits and Systems (ISCAS) - Dynamic memory-based physically unclonable function for the generation of unique identifiers and true random numbers

Keller, Christoph, Gurkaynak, Frank, Kaeslin, Hubert, Felber, Norbert

Year:

2014

Language:

english

File:

PDF, 329 KB

english, 2014

8

A Multilevel CMOS–MEMS Design Methodology Based on Response Surface Models

Sato, Norio, Sato, Yasuhiro, Kado, Yuichi, Ciappa, Mauro, Aemmer, Dölf, Kaeslin, Hubert, Fichtner, Wolfgang

Journal:

Journal of Microelectromechanical Systems

Year:

2011

Language:

english

File:

PDF, 1.40 MB

english, 2011

9

Behandlung der Umlaute bei der Verarbeitung deutscher Texte unter UNIX / How to Handle German Umlauts when Processing Documents under UNIX

Kaeslin, Hubert

Journal:

it - Information Technology

Year:

1988

Language:

german

File:

PDF, 869 KB

german, 1988

10

Systematic extraction and concatenation of diphone elements for the synthesis of standard German speech

Journal:

Signal Processing

Year:

1985

Language:

english

File:

PDF, 73 KB

english, 1985

11

Digital Integrated Circuit Design (From VLSI Architectures to CMOS Fabrication) || VLSI Designer's Checklist

Kaeslin, Hubert

Year:

2008

File:

PDF, 138 KB

2008

12

SPIE Proceedings [SPIE IS&T/SPIE 1994 International Symposium on Electronic Imaging: Science and Technology - San Jose, CA (Sunday 6 February 1994)] Machine Vision Applications in Industrial Inspection II - High-speed VLSI workpiece position measurement using normalized 2Dcorrelation

Rothacher, Fritz M., Felber, Norbert, Kaeslin, Hubert, Dawson, Benjamin M., Wilson, Stephen S., Wu, Frederick Y.

Year:

1994

Language:

english

File:

PDF, 474 KB

english, 1994

13

[IEEE 2009 52nd IEEE International Midwest Symposium on Circuits and Systems (MWSCAS) - Cancun, Mexico (2009.08.2-2009.08.5)] 2009 52nd IEEE International Midwest Symposium on Circuits and Systems - Hardware implementations of the SHA-3 candidates Shabal and CubeHash

Bernet, Markus, Henzen, Luca, Kaeslin, Hubert, Felber, Norbert, Fichtner, Wolfgang

Year:

2009

Language:

english

File:

PDF, 505 KB

english, 2009

14

Architectural design and realization of a single-chip Viterbi decoder

Marc Biver, Hubert Kaeslin, Carlo Tommasini

Journal:

Integration, the VLSI Journal

Year:

1989

Language:

english

File:

PDF, 810 KB

english, 1989

15

[IEEE 2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings - Shanghai, China (2006.10.23-2006.10.26)] 2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings - Latch-Based Clocking for Portable Low-Power Audio Applications

Buergin, Felix, Carbognani, Flavio, Kaeslin, Hubert, Felber, Norbert, Fichtner, Wolfgang

Year:

2006

Language:

english

File:

PDF, 92 KB

english, 2006

16

Digital Integrated Circuit Design (From VLSI Architectures to CMOS Fabrication) || Gate- and Transistor-Level Design

Kaeslin, Hubert

Year:

2008

File:

PDF, 841 KB

2008

17

Digital Integrated Circuit Design (From VLSI Architectures to CMOS Fabrication) || Energy Efficiency and Heat Removal

Kaeslin, Hubert

Year:

2008

File:

PDF, 662 KB

2008

18

[IEEE 2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC) - Istanbul, Turkey (2013.10.7-2013.10.9)] 2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC) - A real-time 720p feature extraction core based on Semantic Kernels Binarized

Schaffner, Michael, Hager, Pascal, Cavigelli, Lukas, Greisen, Pierre, Gurkaynak, Frank K., Kaeslin, Hubert

Year:

2013

Language:

english

File:

PDF, 372 KB

english, 2013

19

Digital Integrated Circuit Design (From VLSI Architectures to CMOS Fabrication) || Physical Design

Kaeslin, Hubert

Year:

2008

File:

PDF, 2.80 MB

2008

20

[IEEE 2006 49th IEEE International Midwest Symposium on Circuits and Systems - San Juan, PR (2006.08.6-2006.08.9)] 2006 49th IEEE International Midwest Symposium on Circuits and Systems - A Self-Timed 16-bit Multiplier for Low-Power Low-Frequency Applications

Carbognani, Flavio, Buergin, Felix, Felber, Norbert, Kaeslin, Hubert, Fichtner, Wolfgang

Year:

2006

Language:

english

File:

PDF, 345 KB

english, 2006

21

[IEEE 2015 Visual Communications and Image Processing (VCIP) - Singapore, Singapore (2015.12.13-2015.12.16)] 2015 Visual Communications and Image Processing (VCIP) - Automatic multiview synthesis — Towards a mobile system on a chip

Schaffner, Michael, Gurkaynak, Frank K., Kaeslin, Hubert, Benini, Luca, Smolic, Aljosa

Year:

2015

Language:

english

File:

PDF, 258 KB

english, 2015

22

Digital Integrated Circuit Design (From VLSI Architectures to CMOS Fabrication) || A Primer on CMOS Technology

Kaeslin, Hubert

Year:

2008

File:

PDF, 3.23 MB

2008

23

Evaluation and FPGA Implementation of Sparse Linear Solvers for Video Processing Applications

Greisen, Pierre, Runo, Marian, Guillet, Patrice, Heinzle, Simon, Smolic, Aljoscha, Kaeslin, Hubert, Gross, Markus

Journal:

IEEE Transactions on Circuits and Systems for Video Technology

Year:

2013

Language:

english

File:

PDF, 1.50 MB

english, 2013

24

[ACM Press the 43rd annual conference - San Francisco, CA, USA (2006.07.24-2006.07.28)] Proceedings of the 43rd annual conference on Design automation - DAC '06 - Low-power architectural trade-offs in a VLSI implementation of an adaptive hearing aid algorithm

Buergin, Felix, Carbognani, Flavio, Hediger, Martin, Meier, Hektor, Meyer-Piening, Robert, Santschi, Rafael, Kaeslin, Hubert, Felber, Norbert, Fichtner, Wolfgang

Year:

2006

Language:

english

File:

PDF, 628 KB

english, 2006

25

[IEEE 2015 Visual Communications and Image Processing (VCIP) - Singapore, Singapore (2015.12.13-2015.12.16)] 2015 Visual Communications and Image Processing (VCIP) - Automatic multiview synthesis — Prototype demo

Schaffner, Michael, Gurkaynak, Frank K., Kaeslin, Hubert, Benini, Luca, Smolic, Aljosa

Year:

2015

Language:

english

File:

PDF, 113 KB

english, 2015

26

Digital Integrated Circuit Design (From VLSI Architectures to CMOS Fabrication) || Outlook

Kaeslin, Hubert

Year:

2008

File:

PDF, 509 KB

2008

27

Digital Integrated Circuit Design (From VLSI Architectures to CMOS Fabrication) || Elementary Digital Electronics

Kaeslin, Hubert

Year:

2008

File:

PDF, 507 KB

2008

28

Digital Integrated Circuit Design (From VLSI Architectures to CMOS Fabrication) || Finite State Machines

Kaeslin, Hubert

Year:

2008

File:

PDF, 278 KB

2008

29

[IEEE 2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings - Shanghai, China (2006.10.23-2006.10.26)] 2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings - Low-power constant-coefficient FIR filtering in a hearing aid application

Carbognani, Flavio, Buergin, Felix, Kraehenbuehl, Daniel, Zuercher, Franz, Felber, Norbert, Kaeslin, Hubert, Fichtner, Wolfgang

Year:

2006

Language:

english

File:

PDF, 289 KB

english, 2006

30

Analysis and VLSI Implementation of EWA Rendering for Real-Time HD Video Applications

Greisen, Pierre, Schaffner, Michael, Heinzle, Simon, Runo, Marian, Smolic, Aljosa, Burg, Andreas, Kaeslin, Hubert, Gross, Markus

Journal:

IEEE Transactions on Circuits and Systems for Video Technology

Year:

2012

Language:

english

File:

PDF, 13.88 MB

english, 2012

31

Digital Integrated Circuit Design (From VLSI Architectures to CMOS Fabrication) || References

Kaeslin, Hubert

Year:

2008

File:

PDF, 218 KB

2008

32

Hybrid ASIC/FPGA System for Fully Automatic Stereo-to-Multiview Conversion using IDW

Schaffner, Michael, Gurkaynak, Frank, Greisen, Pierre, Kaeslin, Hubert, Benini, Luca, Smolic, Aljosa

Journal:

IEEE Transactions on Circuits and Systems for Video Technology

Year:

2015

Language:

english

File:

PDF, 17.21 MB

english, 2015

33

Digital Integrated Circuit Design (From VLSI Architectures to CMOS Fabrication) || Plate section

Kaeslin, Hubert

Year:

2008

File:

PDF, 366 KB

2008

34

Design Challenges for a Differential-Power-Analysis Aware GALS-based AES Crypto ASIC

Frank K. Gürkaynak, Stephan Oetiker, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner

Journal:

Electronic Notes in Theoretical Computer Science

Year:

2006

Language:

english

File:

PDF, 720 KB

english, 2006

35

[IEEE ESSCIRC 2013 - 39th European Solid State Circuits Conference - Bucharest, Romania (2013.09.16-2013.09.20)] 2013 Proceedings of the ESSCIRC (ESSCIRC) - MADmax: A 1080p stereo-to-multiview rendering ASIC in 65 nm CMOS based on image domain warping

Schaffner, Michael, Greisen, Pierre, Heinzle, Simon, Gurkaynak, Frank K., Kaeslin, Hubert, Smolic, Aljoscha

Year:

2013

Language:

english

File:

PDF, 1.96 MB

english, 2013

36

[IEEE 2007 Joint 50th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS) and the IEEE Northeast Workshop on Circuits and Systems (NEWCAS 2007) - Montreal, QC, Canada (2007.08.5-2007.08.8)] 2007 50th Midwest Symposium on Circuits and Systems - Two-phase clocking combined with sleep transistors reduces active leakage in low-frequency portable applications

Carbognani, Flavio, Buergin, Felix, Felber, Norbert, Kaeslin, Hubert, Fichtner, Wolfgang

Year:

2007

Language:

english

File:

PDF, 185 KB

english, 2007

37

VLSI Design of Approximate Message Passing for Signal Restoration and Compressive Sensing

Maechler, Patrick, Studer, Christoph, Bellasi, David E., Maleki, Arian, Burg, Andreas, Felber, Norbert, Kaeslin, Hubert, Baraniuk, Richard G.

Journal:

IEEE Journal on Emerging and Selected Topics in Circuits and Systems

Year:

2012

Language:

english

File:

PDF, 1.98 MB

english, 2012

38

A comparative study of the steady-state zones of German phones using centroids in the LPC parameter space

Journal:

Speech Communication

Year:

1986

Language:

english

File:

PDF, 1.17 MB

english, 1986

39

[ACM Press the The 51st Annual Design Automation Conference - San Francisco, CA, USA (2014.06.01-2014.06.05)] Proceedings of the The 51st Annual Design Automation Conference on Design Automation Conference - DAC '14 - An Approximate Computing Technique for Reducing the Complexity of a Direct-Solver for Sparse Linear Systems in Real-Time Video Processing

Schaffner, Michael, Gürkaynak, Frank K., Smolic, Aljosa, Kaeslin, Hubert, Benini, Luca

Year:

2014

Language:

english

File:

PDF, 2.23 MB

english, 2014

40

[IEEE 2006 49th IEEE International Midwest Symposium on Circuits and Systems - San Juan, PR (2006.08.6-2006.08.9)] 2006 49th IEEE International Midwest Symposium on Circuits and Systems - 29% Power Saving through Semi-Custom Standard Cell Re-Design in a Front-End for Hearing Aids

Buergin, Felix, Carbognani, Flavio, Kaeslin, Hubert, Felber, Norbert, Fichtner, Wolfgang

Year:

2006

Language:

english

File:

PDF, 1.38 MB

english, 2006

41

Transmission Gates Combined With Level-Restoring CMOS Gates Reduce Glitches in Low-Power Low-Frequency Multipliers

Carbognani, Flavio, Buergin, Felix, Felber, Norbert, Kaeslin, Hubert, Fichtner, Wolfgang

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2008

Language:

english

File:

PDF, 749 KB

english, 2008

42

Digital Integrated Circuit Design (From VLSI Architectures to CMOS Fabrication) || Preface

Kaeslin, Hubert

Year:

2008

File:

PDF, 94 KB

2008

43

Digital Integrated Circuit Design (From VLSI Architectures to CMOS Fabrication) || Functional Verification

Kaeslin, Hubert

Year:

2008

File:

PDF, 477 KB

2008

44

Towards Edge-Aware Spatio-Temporal Filtering in Real-Time

Schaffner, Michael, Scheidegger, Florian, Cavigelli, Lukas, Kaeslin, Hubert, Benini, Luca, Smolic, Aljosa

Journal:

IEEE Transactions on Image Processing

Year:

2018

Language:

english

File:

PDF, 8.30 MB

english, 2018

45

Digital Integrated Circuit Design (From VLSI Architectures to CMOS Fabrication) || Modelling Hardware with VHDL

Kaeslin, Hubert

Year:

2008

File:

PDF, 950 KB

2008

46

Digital Integrated Circuit Design (From VLSI Architectures to CMOS Fabrication) || The Case for Synchronous Design

Kaeslin, Hubert

Year:

2008

File:

PDF, 387 KB

2008

47

Digital Integrated Circuit Design (From VLSI Architectures to CMOS Fabrication) || Clocking of Synchronous Circuits

Kaeslin, Hubert

Year:

2008

File:

PDF, 843 KB

2008

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